Zilog Z16C35 User Manual
Page 140
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ISCC
User Manual
UM011002-0808
134
3 may be replaced by interrupt status information if the Vector Include Status option has
been selected (see Interrupt Control Register). The bit positions are shown in Figure 5-29.
Figure 5–58. Interrupt Vector Register
Address: 00010
D6
D7
D5 D4 D3 D2 D1 D0
IV0
IV1
IV2
IV3
IV4
IV5
IV6
IV7
* Potentially modified by interrupt condition
*
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