Zilog Z16C35 - Manual (Page 249)

Application Note
Serial Communication Controller (SCC ™ ): SDLC Mode of Operation
11-6
RECEIVE INTERRUPTS ON FIRST CHARACTER OR SPECIAL CONDITIONS
The sequence of events in this mode is similar to that in
“Receive Interrupts on all received characters and Special
Conditions”, except that it generates Receive Character
Interrupt on the first received character only, and
subsequent data is read by the DMA.
The SCC is placed in this mode by programming Bit D4-3
of WR1 to 01. Once programmed in this mode, the SCC
generates interrupts when it receives the First Character of
the packet or a Special Condition occurs. This mode is for
operation with the DMA. On the interrupt for the first
received character, DMA is enabled. On Special
Conditions (either End-of-Message, overrun, or Parity
error, — parity on the SDLC is not normal, however), the
service routine stops the DMA and starts over again.
Figure 3. Typical SDLC Receive Sequence with Receive Interrupts on First Character or Special Condition
RxCLK Rx Data
Opening Flag
Data 81H
Data 42H
Data 0FFH
Data 42H
CRC 0E013H
Closing Flag
Note 9
/INT
Note 3
➘
Note 3
➘
Note 5
➘
Note 7
➘
Note 1
Note 6
➘
Note 8
➘
Note 10
➘
Note 12
➘
/W//REQ (In /REQ mode)
/SYNC
➘
Note 2
Note 9
➘
Note 4
➘
Note 11
➘
Page 243 of 316
UM011002-0808