Zilog Z16C35 User Manual

Page 190

Advertising
background image

Application Note

The Z180™ Interfaced with the SCC at MHZ

7

The SCC uses /INTACK (Interrupt Acknowledge) for
recognition of an interrupt acknowledge cycle. This pin,
used with /RD, allows the SCC to gate its interrupt vector
onto the data bus. An active /RD signal during an interrupt
acknowledge cycle performs two functions. First, it allows

the highest priority device requesting an interrupt to place
its vector on the data bus. Secondly, it sets the IUS bit in
the highest priority device to show the device is now under
service.

Figure 12. SCC Interrupt Status Diagram

IP

Set

INT

Active

IUS

Set

IP

Cleared

IUS

Cleared

Interrupt Condition

Return To Main Program

CPU Read, Write, or Reset

IEO High?

IEI High?

/INTACK * IEI * /RD

Wait For CPU
/INTACK Cycle

Page 184 of 316

UM011002-0808

Advertising