Zilog Z16C35 User Manual

Page 184

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background image

Application Note

The Z180™ Interfaced with the SCC at MHZ

7-7

7

(Extends Opcode Fetch Cycle Only; Not Working in Z
Mode of Operation)

Figure 5. Physical Memory Address Map

S-RAM Image

EP-ROM Image

S-RAM Image

/EP-ROM Image

S-RAM Image

EP-ROM Image

256K SRAM

EP-ROM

27C256

FFFFFH

F8000H

F0000H

28000H

20000H

18000H

10000H

08000H

00000H

Image can be
killed trhrough
/USRRAM and
/USRROM

Figure 6. Wait State Generator Logic

D

CK

Q

CL

PR

D

CK

Q

CL

PR

'74

'74

/M1

Ø

/M1 /WAIT

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UM011002-0808

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