App note - zilog datacom family with 80186 cpu, Ilog, Atacom – Zilog Z16C35 User Manual
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PPLICATION
N
OTE
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HE
Z
ILOG
D
ATACOM
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AMILY
WITH
THE
80186 CPU
8
ilog’s datacom family evaluation board features the 80186 along with four multiprotocol
serial controllers, and allows customers to evaluate these components in an Intel
environment.
Z
INTRODUCTION
Zilog’s customers need a way to evaluate its serial
communications controllers with a central CPU. This App
Note (Application Note) explains and illustrates how the
datacom family interfaces and communicates with the
80186 on this evaluation board. The board helps the
potential customer to evaluate Zilog’s data communications
controllers in an Intel environment.
The most advanced and complex component of the serial
family is the IUSC. One of the highlights of this App Note
is how the IUSC adapts to the 80186 CPU with a minimum
of difficulty and a maximum of bus and functional flexibility.
GENERAL DESCRIPTION
The evaluation board includes the following hardware.
(Reference two page Schematic diagram at rear of the App
Note - Figures 5A and 5B.)
■
Intel 80186 Integrated 16-bit Microprocessor
■
Zilog Z16C32 Integrated Universal Serial Controller
(IUSC™)
■
Zilog Z16C33 Monochannel Universal Serial Controller
(MUSC™) or USC
®
■
Zilog Z16C35 Integrated Serial Communications
Controller (ISCC™)
■
Zilog Z85230 Enhanced Serial Communications
Controller (ESCC™) or SCC
■
Two 28-pin EPROM sockets, suitable for 2764’s through
27512’s
■
Six 32-pin (or 28-pin) SRAM sockets, suitable for
32K x 8 or 128K x 8 devices
■
Four Altera EPLD circuits comprising the glue logic
(Figures 1-4 at rear of the App Note) and Evaluation
Board Schematic (Figures 5a, 5b)
■
RS-232 and RS-422 line drivers and receivers
■
Pin headers for configuring and interconnecting the
above to serial applications
Notes:
All Signals with a preceding front slash, “/”, are active Low,
e.g.: B//W (WORD is active Low); /B/W (BYTE is active
Low, only).
Power connections follow conventional descriptions
below:
Connection
Circuit
Device
Power
V
CC
V
DD
Ground
GND
V
SS
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