Anritsu 682XXB - Manual (Page 199)

682XXB/683XXB MM 5-33
A7 YIG Loop
Error 113 YIG Loop Osc Failed
Error 115 Not Locked Indicator Failed
Description: Error 113 indicates that the YIG loop is not phase-
locked. Error 115 indicates a failure of the not phased-lock indicator
circuit.
Step 1. Verify the signal output from the A4 Coarse Loop PCB by
performing steps 5 thru 7 in Table 5-11.
G If the coarse loop signals are correct in both frequency
and amplitude, go to step 2.
G If the coarse loop signals are incorrect, replace the A4
PCB.
Step 2. Verify the signal output from the A5 Fine Loop PCB by per-
forming steps 9 thru 11 in Table 5-9.
G If the fine loop signals are correct in both frequency and
amplitude, go to step 3.
G If the fine loop signals are incorrect, replace the A5 PCB.
Step 3. Disconnect the semi-rigid cable at output port J5 of the
switched filter assembly.
Step 4. Set up the 682XXB/683XXB to generate a CW frequency of
2.000 GHz.
Step 5. Using a spectrum analyzer, measure the frequency and am-
plitude of the signal at J5 of the switched filter assembly.
The frequency should be 2.000 GHz
±25 MHz and the ampli-
tude should be from –20 to –27 dBm.
G If the signal is correct in both frequency and amplitude,
go to step 6.
G If the signals are incorrect, replace the switched filter as-
sembly.
Step 6. Repeat steps 4 and 5, incrementing the CW frequency in
1 GHz steps up to 20.000 GHz.
Step 7. If the signals from the coarse loop, fine loop, and switched
filter assembly are all correct, replace the A7 YIG Loop PCB.
Table 5-13. Error Messages 113 and 115 (1 of 2)
TROUBLESHOOTING
TROUBLESHOOTING TABLES