Altera JESD204B IP - Manual (Page 154)

Related Information
• AN 696: Using the JESD204B MegaCore Function in Arria V Devices
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• AN 729: Implementing JESD204B IP Core System Reference Design with Nios II Processor As
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• Altera Transceiver PHY IP Core User Guide
More information about the transceiver PHY signals.
UG-01142
2015.05.04
Debugging JESD204B Link Using SignalTap II and System Console 7-7
JESD204B IP Core Debug Guidelines Altera Corporation
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