Tx phy layer, Receiver, Tx phy layer -8 – Altera JESD204B IP User Manual

Page 45: Receiver -8

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Character replacement for scrambled data

The character replacement for scrambled data in the IP core follows these JESD204B specification rules:
• At end of frame (not coinciding with end of multi-frame), which equals to 0xFC (D28.7), the

transmitter encodes the octet as /F/ character (K28.7).

• At end of multi-frame, which equals to 0x7C, the transmitter replaces the current last octet as /A/

character (K28.3).

For devices that do not support lane synchronization, only /F/ character replacement is done. At every

end of frame, regardless of whether the end of multi-frame equals to 0xFC (D28.7), the transmitter

encodes the octet as /F/ character (K28.7) if it fits the rules above.

TX PHY Layer

The 8B/10B encoder encodes the data before transmitting them through the serial line. The 8B/10B

encoding has sufficient bit transition density (3-8 transitions per 10-bit symbol) to allow clock recovery by

the receiver. The control characters in this scheme allow the receiver to:
• synchronize to 10-bit boundary.

• insert special character to mark the start and end of frames and start and end of multi-frames.

• detect single bit errors.
The JESD204 IP core supports transmission order from MSB first as well as LSB first. For MSB first

transmission, the serialization of the left-most bit of 8B/10B code group (bit "a") is transmitted first.

Receiver

The receiver block, which interfaces to ADC devices, receives the serial streams from one or more TX

blocks and converts the streams into one or more sample streams.
The receiver performs the following functions:
• Data deserializer

• 8B/10B decoding

• Lane alignment

• Character replacement

• Data descrambling

4-8

TX PHY Layer

UG-01142

2015.05.04

Altera Corporation

JESD204B IP Core Functional Description

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