NEC PD750008 - Manual (Page 114)

94
µPD750008 USER'S MANUAL
5.2.3 System Clock and CPU Clock Setting
(1) Time required to change the system clock and CPU clock
The system clock and CPU clock can be changed by using the least significant bit of the SCC and the
low-order two bits of the PCC. This switching is not performed immediately after the contents of the
registers are rewritten, but the system operates with the previous clock for some machine cycles.
Accordingly, after this time period, the STOP instruction must be executed to terminate main system clock
generation.
Table 5-5. Maximum Time Required to Change the System Clock and CPU Clock
Remarks 1. Time indicated in parentheses is required when f
X
= 6.00 MHz and f
XT
= 32.768 kHz.
2. X: Dont care
3. CPU clock F is supplied to the CPU of the µPD750008. The reciprocal of this frequency
is a minimum instruction time (defined as one machine cycle in this manual).
Cautions 1. When the PCC is set to 0001B ( F F F F F = f
X
/16), do not set SCC.0 to 1. Before switching
the main system clock to the subsystem clock, be sure to manipulate the PCC so
other than 0001B is set. When the system operates on the subsystem clock, the
PCC must also be other than 0001B.
2. The fluctuation of the ambient temperature around an oscillator and the performance
of a load capacity change f
X
and f
XT
. In particular, when f
X
is higher than the nominal
value or f
XT
is lower than the nominal value, the machine cycles calculated by f
X
/64f
XT
,
f
X
/ 8f
XT
, and f
X
/4f
XT
in Table 5-5 are longer than the machine cycle calculated by the
nominal values of f
X
and f
XT
. Therefore, the wait time required to change the system
clock and CPU clock should be longer than the machine cycle calculated by the
nominal values of f
X
and f
XT
.
Setting before
switching
SCC0 PCC1 PCC0 SCC0
0
PCC1
0
PCC0
0
SCC0
0
PCC1
0
PCC0
1
SCC0
0
Setting after switching
1
PCC0
0
SCC0
0
PCC1
1
PCC0
1
SCC0
1
PCC1
x
PCC0
x
f
X
/64f
XT
machine
cycles
(3 machine cycles)
1 machine
cycle 1 machine
cycle 1 machine
cycle 0 0
Not to be set 4 machine
cycles 4 machine
cycles 0 1
f
X
/8f
XT
machine
cycles
(23 machine cycles)
8 machine
cycles 8 machine
cycles 1 0
f X /4f XT machine
cycles
(46 machine cycles)
16 machine
cycles 16 machine
cycles 1 1
1 machine
cycle 1 machine
cycle Not to be
set x x
4 machine
cycles
8 machine
cycles
16 machine
cycles
1 machine
cycle
0
1
PCC1