NEC PD750008 - Manual (Page 161)

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CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
(4) Signals
Figure 5-45 shows operations of RELT and CMDT.
Figure 5-45. Operations of RELT and CMDT
(5) Switching between MSB and LSB as the first transfer bit
The three-wire serial I/O mode has a function that can switch between the MSB and LSB as the first bit
of transfer.
Figure 5-46 shows the configuration of shift register (SIO) and internal bus. As shown in Figure 5-46,
read or write operation can be performed by switching between the MSB and LSB.
This switching can be specified using bit 2 of serial operation mode register (CSIM).
Figure 5-46. Transfer Bit Switching Circuit
The first bit is switched by changing the order of data bits written to shift register (SIO). The shift operation
order of SIO is always the same.
Accordingly, the first bit must be switched between the MSB and LSB before writing data to the shift
register.
SO latch
RELT
CMDT
SCK
7
6
Internal bus
1
0
LSB first
MSB first
SI D Q
SO
Read/write gate
Shift resister (SIO)
SO latch
Read/write gate