NEC PD750008 - Manual (Page 199)

179
CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
If ACK is not returned from the slave within a predetermined period after transmission
completion, the occurrence of an error is assumed; the master outputs the ACK signal as a
dummy.
Figure 5-79. Master and Slave Operation in Case of Error
The following errors may occur:
• Error that may occur on the slave side
<1> Invalid command transfer format
<2> Reception of an undefined command
<3> Insufficient number of transfer data bytes for a READ command
<4> Insufficient area to contain data for a WRITE command
<5> Change in data during transmission of a READ, STATUS, or CHGMST command
If any of the above types of errors occurs, ACK is not returned.
• Error that may occur on the master side
If data transmitted with a WRITE command changes during transmission, the master
transmits a STOP command to the slave.
5.6.8 Manipulation of SCK Pin Output
The SCK/P01 pin has a built-in output latch, so that this pin allows static output by software manipulation
in addition to normal serial clock output.
The number of SCK pulses can be software-set arbitrarily by manipulating the P01 output latch. (The SO/
SB0/P02 or SI/SB1/P03 pin is controlled by manipulating the RELT and CMDT bits of SBIC.)
The procedure for manipulating SCK/P01 pin output is explained below.
<1> Set serial operation mode register (CSIM) (SCK pin: output mode). When serial transfer is halted,
SCK from the serial clock control circuit is set to 1.
<2> Manipulate the P01 output latch by using a bit manipulation instruction.
Reception is completed.
Error is assumed, and processing is halted.
Transfer is completed.
ACK check is started.
ACK wait time
ACK from slave is checked.
Error is assumed.
ACK is output.
Erroneous data ACK
Processing by slave
SB0, SB1
Processing by master