NEC PD750008 - Manual (Page 91)

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CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
Figure 5-4. Configurations of Ports 3n and 6n (n = 0 to 3)
Note For port 6n only
Bit m of
POGA
Pull-up
resistor
P-ch
V DD
Pmn
Input buffer
M
P
X
PMmn = 0
PMmn = 1
PMmn
Output latch
Corresponding bits of
port mode register group A
Output buffer
m = 3, 6
n = 0 to 3
Internal bus
Input buffer with
hysteresis
Note
Key interrupt Note