Block diagram – NEC PD750008 User Manual

Page 25

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5

CHAPTER 1 GENERAL

1.4 BLOCK DIAGRAM

Notes 1. The program counter for the µPD750004 consists of 12 bits, 13 bits for the µPD750006 and

µPD750008, and 14 bits for the µPD75P0016.

2. The ROM capacity depends on the product.

3. ( ) : µPD75P0016

TI0

PTO0

PTO1

BUZ

SI/SB1

SO/SB0

SCK

INT0
INT1
INT2

Basic interval timer/
watchdog timer

INTBT

Timer/event
counter

Timer counter

Wach timer

INTT1

Clocked serial
interface

INTCSI

Interrupt
control

Program
counter

Note 1

ROM

Note 2

program
memory

ALU

CY

P00 - P03

BANK

Decode and
control

General register

f

X

/2

N

Clock output
control

PCL/P22

Clock divider

Clock generator

Sub

Main

Standby
control

XT1 XT2

X1 X2

V

SS

RESET

V

DD

CPU clock

IC

(V

PP

)

Note 3

SBS

P80, P81

P10 - P13

P20 - P23

P30 - P33

P40 - P43

P50 - P53

P60 - P63

P70 - P73

P30/MD0 -

Note 3

P33/MD3

INT4

KR0 - KR7

INTW

INTT0

TOUT0

TOUT0

RESET

RAM
data memory
512 x 4 bits

SP

Port 0

Port 1

Port 2

Port 3

Port 4

Port 5

Port 6

Port 7

Port 8

Bit sequential
buffer (16)

2

4

4

4

4

4

4

4

4

( )

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