NEC PD750008 - Manual (Page 66)

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µPD750008 USER'S MANUAL
4.1.2 Setting of the Stack Bank Selection Register (SBS)
The Mk I mode and Mk II mode are switched by stack bank selection register. Figure 4-1 shows the register
configuration.
The stack bank selection register is set with a 4-bit memory operation instruction. To use the CPU in Mk
I mode, initialize the register to 10xxB Note at the beginning of the program. To use the CPU in Mk II mode,
initialize it to 00xxB Note .
Figure 4-1. Stack Bank Selection Register Format
Note Specify the desired value in xx.
Caution The CPU operates in Mk I mode after the RESET signal is issued, because bit 3 of SBS
is set to 1. Set bit 3 of SBS to 0 (Mk II mode) to use the CPU in Mk II mode.
SBS0 SBS1 SBS2 SBS3
0 1 2 3
F84H
Address
SBS
Symbol
0
0
0
1
Memory bank 0
Memory bank 1
Other settings are inhibited
0
1
Mk II mode
Mk I mode
Mode switching designation
Bit 2 must be set to 0
Stack area designation