NEC PD750008 - Manual (Page 213)

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CHAPTER 6 INTERRUPT AND TEST FUNCTIONS
Figure 6-6. Format of Edge Detection Mode Registers
(a) INT0 edge detection mode register (IM0)
(b) INT1 edge detection mode register (IM1)
Caution Changing the edge detection mode register may set an interrupt request flag. So, disable
the interrupts before changing the edge detection mode register. Then clear the interrupt
request flag with a CLR1 instruction and enable the interrupts. When f
X
/64 is selected
as a sampling clock pulse in changing IM0, wait for 16 machine cycles after changing the
mode register and clear the interrupt request flag.
FB4H
Address
0
0
Specifies rising edge.
Specifies falling edge.
Detection edge specification
0
1
1
1
0
1
IM01 IM00
Specifies both rising and falling edges.
Ignored (No interrupt request flag is set.)
3
IM03
2
IM02
1
IM01
0
IM00 IM0
Symbol
0
1
Selects a noise eliminator.
Does not select a noise eliminator.
Noise eliminator selection bit
Enabled
Disabled
IM02 Sampling
Cannot be released
Can be released
Standby mode
0
1
Φ (0.67 µs, 1.33 µs, 2.67 µs, and 10.7 µs at 6.00 MHz)
f X /64 (10.7 µs at 6.00 MHz)
Sampling clock IM03
FB5H
Address
0
1
Specifies rising edge.
Specifies falling edge.
Detection edge specification IM10
3
0
2
0
1
0
0
IM10 IM1
Symbol