NEC PD750008 - Manual (Page 337)

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APPENDIX E HARDWARE INDEX
E.1 HARDWARE INDEX (ALPHABETICAL ORDER WITH RESPECT TO THE HARDWARE NAME)
[A]
Acknowledge detection flag ... 132
Acknowledge enable bit ... 132
Acknowledge trigger bit ... 132
[B]
Bank select register ... 65
Basic interval timer ... 99
Basic interval timer mode register ... 99
Bit sequential buffer ... 181
BT interrupt enable flag ... 187
BT interrupt request flag ... 187
Bus release detection flag ... 133
Bus release trigger bit ... 133
Busy enable bit ... 132
[C]
Carry flag ... 62
Clock mode register ... 106
Clock output mode register ... 97
Command detection flag ... 132
Command trigger bit ... 133
[E]
Edge detection mode register ... 193, 213
[I]
Interrupt enable flag for clock timer ... 210
Interrupt master enable flag ... 189
Interrupt request flag for clock timer ... 210
Interrupt status flag ... 63, 194
INT0 edge detection mode register ... 193
INT0 interrupt enable flag ... 187
INT0 interrupt request flag ... 187
INT1 edge detection mode register ... 193
INT1 interrupt enable flag ... 187
INT1 interrupt request flag ... 187
INT2 edge detection mode register ... 213
INT2 interrupt enable flag ... 210
INT2 interrupt request flag ... 210
INT4 interrupt enable flag ... 187
INT4 interrupt request flag ... 187
[K]
Key interrupt input ... 211
[M]
Memory bank enable flag ... 21, 64
Memory bank select register ... 21, 65
[P]
Port 0 to port 8 ... 68
Port mode register group A ... 75
Port mode register group B ... 75
Port mode register group C ... 75
Processor clock control register ... 86
Program counter ... 47
Program status word ... 62
Pull-up resistor specification register
group A ... 82
Pull-up resistor specification register
group B ... 82
E