NEC PD750008 User Manual
Page 209
Advertising
189
CHAPTER 6 INTERRUPT AND TEST FUNCTIONS
Figure 6-3. Interrupt Priority Specification Register
IPS0
IPS1
IPS2
IPS3
0
1
2
3
IPS
Symbol
FB2H
Address
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
0
1
High-order interrupt selection
All low-order interrupt
VRQ1
(INTBT/INT4)
VRQ2
(INT0)
VRQ3
(INT1)
VRQ4
(INTCSI)
VRQ5
(INTT0)
VRQ6
(INTT1)
Not to be set
The listed vectored
interrupts are treated
as high-order interrupts.
Interrupt master enable flag (IME)
All interrupts are disabled and no vectored interrupt is
activated.
The interrupt enable flag corresponding to an interrupt
request flag controls interrupt enabling/disabling.
Advertising