NEC PD750008 User Manual

Page 15

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LIST OF FIGURES (2/4)

Figure No.

Title

Page

5-9

I/O Timing Chart of Digital I/O Ports ................................................................................

82

5-10

ON Timing Chart of Built-in Pull-Up Resistor Connected by Software ..........................

83

5-11

Block Diagram of the Clock Generator ............................................................................

84

5-12

Format of the Processor Clock Control Register .............................................................

87

5-13

Format of the System Clock Control Register .................................................................

88

5-14

External Circuit for the Main System Clock Oscillator ....................................................

89

5-15

External Circuit for the Subsystem Clock Oscillator ........................................................

89

5-16

Examples of Oscillator Connections Which Should Be Avoided ....................................

90

5-17

Subsystem Clock Oscillator ..............................................................................................

92

5-18

Sub-Oscillator Control Register (SOS) Format ...............................................................

93

5-19

Changing the System Clock and CPU Clock ...................................................................

95

5-20

Configuration of the Clock Output Circuit ........................................................................

96

5-21

Format of the Clock Output Mode Register .....................................................................

97

5-22

Application to Remote Control Output .............................................................................

98

5-23

Block Diagram of the Basic Interval Timer/Watchdog Timer ..........................................

99

5-24

Format of the Basic Interval Timer Mode Register ......................................................... 100

5-25

Format of the Watchdog Timer Enable Flag (WDTM) ..................................................... 101

5-26

Block Diagram of the Clock Timer ................................................................................... 106

5-27

Clock Mode Register Format ........................................................................................... 107

5-28

Block Diagram of the Timer/Event Counter (Channel 0) ................................................ 109

5-29

Block Diagram of the Timer Counter (Channel 1) ........................................................... 110

5-30

Timer/Event Counter Mode Register (Channel 0) Format .............................................. 112

5-31

Timer Counter Mode Register (Channel 1) Format ......................................................... 113

5-32

Timer/Event Counter Output Enable Flag Format ........................................................... 114

5-33

Timer/Event Counter Mode Register Setup ..................................................................... 115

5-34

Timer/Event Counter Output Enable Flag Setup ............................................................. 116

5-35

Configuration of Timer/Event Counter ............................................................................. 118

5-36

Count Operation Timing ................................................................................................... 119

5-37

Error at the Start of the Timer .......................................................................................... 120

5-38

Example of the SBI System Configuration ...................................................................... 124

5-39

Block Diagram of the Serial Interface .............................................................................. 125

5-40

Format of Serial Operation Mode Register (CSIM) ......................................................... 127

5-41

Format of Serial Bus Interface Control Register (SBIC) ................................................. 131

5-42

Peripheral Hardware of Shift Register ............................................................................. 134

5-43

Example of Three-Wire Serial I/O System Configuration ................................................ 137

5-44

Timing of Three-Wire Serial I/O Mode ............................................................................. 140

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