NEC PD750008 - Manual (Page 163)

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CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
(b) Data is transmitted and received starting with the LSB on an external clock (slave operation).
(In this case, the function of inverting the MSB/LSB is used for shift register read/write operation.)
<Sample program>
Main routine
CLR1 MBE
MOV XA,#84H
MOV CSIM,XA ; Serial operation halt, MSB/LSB invert mode, external clock
MOV XA,TDATA
MOV SIO,XA ; Set transfer data, and start transfer
EI IECSI
EI
Interrupt routine (MBE = 0)
MOV XA,TDATA
XCH XA,SIO ; Start to transfer receive data and transmit data
MOV RDATA,XA ; Save receive data
RETI
(c) Data is transmitted and received at high speed by using a transfer clock of 524 kHz (during
4.19 MHz operation).
P01/SCK
SI/SB1
SCK
SO
Other microcomputers
SO/SB0 SI
µPD750008
SCK
µPD750008 (master)
SO/SB0
SCK
SI
µPD75206, etc.
SI/SB1 SO