NEC PD750008 - Manual (Page 158)

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µPD750008 USER'S MANUAL
Serial interface operation enable/disable specification bit (W)
Shift register operation Serial clock counter IRQCSI flag SO/SB0 and SI/SB1 pins
CSIE 1 Shift operation enabled Count operation Can be set Used in each mode
as well as for port 0
Signal from address comparator (R)
COI Note Condition for being cleared (COI = 0) Condition for being set (COI = 1)
When the slave address register (SVA) When the slave address register (SVA)
does not match the data of the shift register matches the data of the shift register
Note COI can be read only before serial transfer is started or after serial transfer is completed. An
undefined value may be read during transfer. COI data written by an 8-bit manipulation instruction
is ignored.
Wake-up function specification bit (W)
WUP 0 Sets IRQCSI each time serial transfer is completed.
Serial interface operation mode selection bit (W)
CSIM4 CSIM3 CSIM2 Shift register sequence SO pin function SI pin function
x 0 0 SIO
7-0
<—> XA SO/P02 SI/P03
(Transfer starting with MSB) (CMOS output) (Input)
1 SIO
0-7
<—> XA
(Transfer starting with LSB)
Remark x: Don’t care
Serial clock selection bit (W)
CSIM1 CSIM0 Serial clock SCK pin mode
0 0 External clock applied to SCK pin Input
0 1 Timer/event counter output (TOUT0) Output
1 0 f
X
/2 4 (262 kHz) Note
1 1 f
X
/2 3 (524 kHz) Note
Note ( ): fx = 4.19 MHz