NEC PD750008 - Manual (Page 33)

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CHAPTER 2 PIN FUNCTIONS
2.2.2 P20-P23 (PORT2) : I/O Pins Used Also for PTO0, PTO1, PCL, and BUZ
P30-P33 (PORT3) : I/O Pins Used Also for MD0-MD3 Note
P40-P43 (PORT4),
P50-P53 (PORT5) : N-ch Open-Drain Intermediate Withstand Voltage (13 V) Large-Current
Output
P60-P63 (PORT6),
P70-P73 (PORT7) : Tristate I/O
These pins are the I/O pins of the 4-bit I/O ports with output latches: Ports 2 to 7.
Port n (n = 2, 3, 6, and 7) functions as I/O ports, and also have the following functions:
(1) Port 2 : Timer/event counter (PTO0, PTO1)
Clock output (PCL)
Fixed frequency output (BUZ)
(2) Port 3 : Mode selection for program memory (PROM) write/verify operation (MD0-MD3) Note
(3) Ports 6 and 7: Key interrupt input (KR0-KR3, KR4-KR7)
Note Provided only in the µPD75P0016.
Port 3 is a large-current output. Ports 4 and 5 are N-ch open-drain intermediate withstand voltage (13 V)
large-current output. These ports can directly drive the LED.
An I/O mode is selected by the port mode register. The I/O mode of port m (m = 2, 4, 5, and 7) can be
selected in units of 4 bits, and the I/O mode of ports 3 and 6 can be selected bit by bit.
Port n can be connected with built-in pull-up resistors in units of 4 bits by software. This can be done by
manipulating pull-up resistor specification register group A (POGA). For ports 4 and 5, the use of built-in pull-
up resistors can be specified bit by bit by mask option.
Ports 4 and 5, and ports 6 and 7 can be paired respectively for 8-bit I/O.
A RESET input clears the output latches in the ports, places port n in the input mode (output high-
impedance state), and drives ports 4 and 5 high if pull-up resistors are provided or causes ports 4 and 5
to go into a high-impedance state.
2.2.3 P80, P81 (PORT8)
These pins are the I/O pins of the 2-bit I/O ports with output latches: Port 8.
Port 8 can be connected with built-in pull-up resistors in units of 2 bits by software. This can be done by
manipulating pull-up resistor specification register group B (POGB).
2.2.4 TI0: Input Pin Used Also for Port 1
This is an external event pulse input pin for the programmable timer/event counter.
A Schmitt-triggered input is used for the TI0 pin.
2.2.5 PTO0, PTO1: Output Pin Used Also for Port 2
This is the output signal pin of the programmable timer/event counter and programmable timer counter.
Square-wave pulses appear on this pin. To output a signal from the programmable timer/event counter and
programmable timer counter, the output latch P20 or P21 must be cleared to 0, and the bit for port 2 in the
port mode register must be set to 1 (output mode).
The output is cleared to 0 by the timer start instruction.
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