NEC PD750008 - Manual (Page 185)

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CHAPTER 5 PERIPHERAL HARDWARE FUNCTIONS
Table 5-10. Various Signals Used in the SBI Mode (1/2)
SCK
SB0, SB1
“H” “H”
SCK
SB0, SB1
Rising edge of SB0 or SB1 when SCK = 1 Falling edge of SB0 or SB1 when SCK = 1 Low level signal output on SB0 or SB1 during one SCK clock cycle after serial reception is completed [Synchronous BUSY signal] Low level signal output on SB0 or SB1 after acknowledge signal High level signal output on SB0 or SB1 before serial transfer is started or after serial transfer is completed
Bus release signal (REL) Command signal (CMD) Acknowledge signal (ACK) Busy signal (BUSY) Ready signal (READY)
Output device
Definition
• RELT is set. • CMDT is set. <1>
ACKE = 1
<2>
ACKT is set.
• BSYE = 1 <1>
BSYE = 0
<2>
Execution of
instruction to write data to SIO (Transfer start request)
Condition for output
• RELD is set. • CMDD is clear-
ed.
• CMDD is set. • ACKD is set.
Flag operation
Meaning of signal
Indicates that CMD signal follows and data transmitted is address data. i) Data transmitted after REL signal output is address. ii) Data transmitted, with REL signal not being output, is command. Indicates completion of reception. Indicates that serial reception is disabled because processing is in progress. Indicates that serial reception is enabled.
Signal name
Timing chart
READY READY
ACK
SCK
D0 D0
SB0, SB1
9
BUSY
ACK
BUSY
– –
Master Master Master/ slave Slave Slave
[Synchronous BUSY output]
SB0, SB1