Lenze EVS9332xS - Manual (Page 260)

Appendix
5.2 Index
5−6
l
EDSVS9332S−EXT EN 2.0
Flying synchronising, 2−27
Following error limit, 2−27
Free control codes, overview, 3−14
Free digital outputs (FDO), 3−88
Free piece counter (FCNT), 3−87
Freely assignable input variables (FEVAN), 3−90
Function blocks, 3−3 , 3−12
− Actual angle integrator (PHDIFF), 3−148
− Addition block (ADD), 3−16
− analog input (AIN), 3−22
− Analog output (AOUT), 3−29
− Analog signal changeover switch (ASW), 3−33
− AND operation (AND), 3−24
− angle addition block (PHADD), 3−145
− Angle comparator (PHCMP), 3−146
− angle conversion (CONVPHA), 3−50
− Angle conversion (CONVPHPH), 3−51
− Angle conversion (CONVPP), 3−52
− Angle signal adaptation (PHDIV), 3−149
− Arithmetic blocks (ARIT), 3−31
− Automation interface (AIF−IN), 3−17
− Automation interface (AIF−OUT), 3−20
− Characteristic function (CURVE), 3−53
− comparator (CMP), 3−42
− Configuration code, 3−5
− Connection, 3−6
− Control of drive controller (DCTRL), 3−57
Controller inhibit (CINH), 3−59
Operation inhibit (DISABLE), 3−59
Parameter set changeover (PAR), 3−61
Quick stop (QSP), 3−58
TRIP−RESET, 3−60
TRIP−SET, 3−59
− Create connections, 3−8
− CW/CCW/QSP linking (R/L/Q), 3−157
− Dead band(DB), 3−56
− delay element (PT1−1), 3−156
− Delay elements (DIGDEL), 3−81
− Derivative−action element (DT1), 3−86
− Digital frequency output (DFOUT), 3−65
− Digital frequency processing (DFSET), 3−75
− digital frequency ramp function generator (DFRFG), 3−69
− Digital inputs (DIGIN), 3−84
− Digital outputs (DIGOUT), 3−85
− Digital status signals (STAT), 3−169
− Display code, 3−5
− Edge evaluation (TRANS), 3−183
− Fixed setpoints (FIXSET), 3−95
− Flipflop (FLIP), 3−97
− Free digital outputs (FDO), 3−88
− Free piece counter (FCNT), 3−87
− gearbox compensation (GEARCOMP), 3−100
− holding brake (BRK), 3−35
− holding brake (BRK1)
disengaging the brake, 3−37
engaging the brake, 3−37
setting controller inhibit, 3−38
− Homing function (REF), 3−158
− Input name, 3−4
− Input symbol, 3−4
− Internal motor control (MCTRL), 3−102
− Inverter (ANEG), 3−28
− Limiting element (LIM), 3−101
− Logic NOT, 3−128
− Mains failure control (MFAIL), 3−111
− master frequency input (DFIN), 3−62
− Monitor outputs of monitoring system (MONIT), 3−123
− motor phase failure detection (MLP), 3−122
− Motor potentiometer (MPOT), 3−125
− Multi−axis synchronisation (SYNC), 3−175
− Names, 3−4
− OR operation (OR), 3−135
− Oscilloscope function (OSZ), 3−138
− Output name, 3−5
− Output symbol, 3−5
− overview, 3−12
− Parameterisation code, 3−5
− Phase integrator (PHINT), 3−150
− Process controller (PCTRL1), Dancer position, tension, pressure
controller, 3−142
− Ramp generator(RFG), 3−164
− Remove connections, 3−9
− Sample and hold function (S&H), 3−166
− Signal conversion (CONV), 3−47
− Signal types, 3−3
− speed setpoint conditioning (NSET), 3−130
− State bus connection, 3−170
− storage block (STORE), 3−171
− system bus (CAN−IN), 3−40
− system bus (CAN−OUT), 3−41
Function blocks , Freely assignable input
variables (FEVAN), 3−90
function blocks, S−shaped ramp function
generator (SRFG), 3−167
Function library, 3−1
G
Gearbox compensation (GEARCOMP), 3−100
Gearbox factors, weighting factors, 2−13
Global Drive Control, configuration with, 2−3
H
Holding brake (BRK), 3−35
Homing, 2−30 , 2−33
Homing function (REF), 3−158
− Homing modes, 3−160
− profile generator, 3−159