5 pci target cycles, 1 pci accesses to csr, 2 pci accesses to dram – Intel NETWORK PROCESSOR IXP2800 User Manual

Page 326: 3 pci accesses to sram, 4 target write accesses from the pci bus, Pci target cycles 9.2.5.1, Pci accesses to csr, Pci accesses to dram, Pci accesses to sram, Target write accesses from the pci bus

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5 pci target cycles, 1 pci accesses to csr, 2 pci accesses to dram | 3 pci accesses to sram, 4 target write accesses from the pci bus, Pci target cycles 9.2.5.1, Pci accesses to csr, Pci accesses to dram, Pci accesses to sram, Target write accesses from the pci bus | Intel NETWORK PROCESSOR IXP2800 User Manual | Page 326 / 430 5 pci target cycles, 1 pci accesses to csr, 2 pci accesses to dram | 3 pci accesses to sram, 4 target write accesses from the pci bus, Pci target cycles 9.2.5.1, Pci accesses to csr, Pci accesses to dram, Pci accesses to sram, Target write accesses from the pci bus | Intel NETWORK PROCESSOR IXP2800 User Manual | Page 326 / 430
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