1 receive pins, 2 rbuf, Receive pins – Intel NETWORK PROCESSOR IXP2800 User Manual

Page 248: Rbuf, Section 8.2.1, Section 8.2.2

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248

Hardware Reference Manual

Intel

®

IXP2800 Network Processor

Media and Switch Fabric Interface

8.2.1

Receive Pins

The use of the receive pins is a function of RPROT input, as shown in

Table 86

.

In general, hardware does framing, parity checking, and flow control message handling.
Interpretation of frame header and payload data is done by Microengine software.

The internal clock used is taken from the RCLK pin. RCLK_Ref output is a buffered version of

the clock. It can be used to supply TCLK_Ref of the Egress IXP2800 Network Processor if

desired.

The receive pins RDAT[15:0], RCTL, RPAR are sampled relative to RCLK. To work at high
frequencies, each of those pins has de-skewing logic as described in

Section 8.6

.

8.2.2

RBUF

RBUF is a RAM that holds received data. It stores received data in sub-blocks (referred to as
elements), and is accessed by a Microengine or the Intel XScale

®

core reading the received

information. Details of how RBUF elements are allocated and filled is based on the receive data

protocol, and is described in

Section 8.2.2.1

Section 8.2.2.2

. When data is received, the

associated status is put into the Full_Element_List FIFO and subsequently sent to a Microengine

for processing. Full_Element_List insures that received elements are sent to a Microengine in the
order in which the data was received.

RBUF contains a total of eight Kbytes of data.

Table 87

shows the order in which received data is

stored in RBUF. Each number represents a byte, in order of arrival from the receiver interface.

The mapping of elements to address offset in RBUF is based on the RBUF partition and element

size, as programmed in the MSF_Rx_Control CSR. RBUF can be partitioned into one, two, or

three partitions based on MSF_Rx_Control[RBUF_Partition]. The mapping of received data to
partitions is shown in

Table 88

.

Table 86. Receive Pins Usage by Protocol

Name

Direction

SPI-4 Use

CSIX Use

RCLK

Input

RDCLK

TxClk

RDAT[15:0]

Input

RDAT[15:0]

TxData[15:0]

RCTL

Input

RCTL

TxSOF

RPAR

Input

Not Used

TxPar

RSCLK

Output

RSCLK

Not Used

RSTAT[1:0]

Output

RSTAT[1:0]

Not Used

Table 87. Order in which Received Data Is Stored in RBUF

Data/Payload

Address Offset (Hex)

4

5

6

7

0

1

2

3

0

C

D

E

F

8

9

A

B

8

14

15

16

17

10

11

12

13

10

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