Intel NETWORK PROCESSOR IXP2800 - Manual (Page 259)

Hardware Reference Manual 259
Intel
®
IXP2800 Network Processor
Media and Switch Fabric Interface
When MSF_RX_CONTROL[RX_Calendar_Mode] is set to Force_Override, the value of
RX_PORT_CALENDAR_STATUS_# is used to determine which status value is sent. If
RX_PORT_CALENDAR_STATUS_# is set to 0x3, then the global status value set in
MSF_RX_CONTROL[RSTAT_OV_VALUE] is sent; otherwise, the port-specific status value
set in RX_PORT_CALENDAR_STATUS_# is sent.
The RBUF upper limit is based on the MSF_RX_CONTROL register and is defined in Table 89 .
The upper limit is programmed in HWM_Control[RBUF_S_HWM]. Note that either RBUF
partition 0 or partition 1 will be used for SPI-4 ( Table 88 ).
8.2.7.2 CSIX
There are two types of CSIX flow control:
• Link-level
• Virtual Output Queue (VOQ)
Information received from the Switch Fabric by the Egress IXP2800 Network Processor, must be
communicated to the Ingress IXP2800 Network Processor, which is sending data to the Switch
Fabric.
8.2.7.2.1 Link-Level
Link-level flow control can be used to stop all transmission. Separate Link-level flow control is
provided for Data CFrames and Control CFrames. CSIX protocol provides link-level flow control
as follows. Every CFrame Base Header contains a Ready Field, which contains two bits; one for
Control traffic (bit 6 of byte 1) and one for Data traffic (bit 7 of byte 1). The CSIX requirement for
response is:
From the tick that the Ready Field leaves a component the maximum response time for a pause
operation is defined as: n*T, n=C+L where:
• T is the clock period of the interface
• n is the maximum number of ticks for the response
• C is a constant for propagating the field within the “other” component (or chipset as the case
may be) to the interface logic controlthe reverse direction data flow. C is defined to be
32 ticks.
• L is the maximum number of ticks to transport the maximum fabric CFrame size.
As each CFrame is received, the value of these bits is copied (by receive hardware) into the
FC_Egress_Status[SF_CReady] and FC_Egress_Status[SF_DReady] respectively. The value of
these two bits is sent from the Egress to the Ingress IXP2800 Network Processor on the TXCSRB
signal, and can be used to stop transmission to the Switch Fabric, as described in Section 8.3.4.2 .
The TXCSRB signal is described in Section 8.5.1 .