Intel NETWORK PROCESSOR IXP2800 - Manual (Page 143)

Hardware Reference Manual 143
Intel
®
IXP2800 Network Processor
Intel XScale ® Core
The Flash memory interface is used for the PROM device. The microprocessor interface can be
used for SONET/SDH Framer microprocessor access.
There are two ports in the Slowport unit. The first is dedicated to the flash memory device while
the second to the microprocessor device.
3.12.7.1 PROM Device Support
For all the Flash Memory access, only 8-bit devices are supported. APB write transactions are
assumed to be 8-bits wide, and correspond to one write cycle at the flash interface. The extended
APB read transactions are assumed to be 32-bits wide, and correspond to four read cycles at the
flash memory interface for all the flash memory data read. However, for the flash register read
inside the flash memory, like the flash status register, the returned data is one byte and placed in the
lower order byte location. In this case, only one external transaction cycle is involved.
To accomplish this, a register (SP_FRM) is installed to allow to configure between 8-bit read mode
and 32-bit read mode. By default, it goes to 32-bit read mode. For the 8-bit read mode, one read
cycle is involved. No packing process is needed. The data will be directly placed onto the lower
order byte, [7:0] and passed to APB. For the 32-bit read mode, it needs four read cycles. All 4 bytes
are packed into a 32-bit data and passed to the APB. 16-bit mode is not supported for read.
Write always accesses the flash with one 8-bit cycle. Therefore, no unpacking process is needed.
The PROM devices supported are listed in Figure 54 :
3.12.7.2 Microprocessor Interface Support for the Framer
The Slowport Unit also supports a microprocessor interface with Framer components. Some
supported devices are listed in Table 55 :
Table 54. 8-Bit Flash Memory Device Density
Vendor Part Number Size
Intel 28F128J3A 16 MB
Intel 28F640J3A 8 MB
Intel 28F320J3A 4 MB
Table 55. SONET/SDH Devices (Sheet 1 of 2)
Vendor Part Number
Microprocessor
Interface
SP_PCR register
Setting
DW Setting in
SP_ADC register
PMC-Sierra* PM3386 16 bits 0x3 0x1
PMC-Sierra* PM5345 8 bits 0x2 0x0
PMC-Sierra* PM5346 8 bits 0x2 0x0
PMC-Sierra* PM5347 8 bits 0x2 0x0
PMC-Sierra* PM5348 8 bits 0x2 0x0
PMC-Sierra* PM5349 8 bits 0x2 0x0
PMC-Sierra* PM5350 8 bits 0x2 0x0
PMC-Sierra* PM5351 8 bits 0x2 0x0
PMC-Sierra* PM5352 8 bits 0x2 0x0