Intel NETWORK PROCESSOR IXP2800 - Manual (Page 335)

Hardware Reference Manual 335
Intel
®
IXP2800 Network Processor
PCI Unit
9.3.3.2 DRAM Slave Reads
For target reads from IXP2800 Network Processor memory, the entire 64-byte block is fetched
from DRAM. For target reads from IXP2800/IXP2850 Network Processor memory, the block size
is 16 bytes. Depending on the address for the target request, extra data is discarded at the beginning
until the target address is reached. Also, extra data is discarded at the end of the transfer also when
the burst ends in the middle of a data block. No pre-fetch is supported for DRAM access. See
Figure 123 .
Figure 122. Example of Target Write to DRAM of 68 Bytes
A9769-02
11111111
00000011
11111111
11111111
11111111
11111111
11111111
11111111
11111111
00111111
00000000
00000000
00000000
00000000
00000000
00000000
00000000
00000000
11111100 11000000
Memory Transfer
Internal
Bus Data
Byte Lane
PCI Bus
Byte Enables
Slave Write Burst to memory
Starting address = 0x6
Byte Enables Address Size
1 64-bit double Dword
0x0
0x08
0x48
1 64-bit double Dword
6 64-bit double Dwords