Intel NETWORK PROCESSOR IXP2800 - Manual (Page 29)

Hardware Reference Manual 29
Intel
®
IXP2800 Network Processor
Technical Description
Figure 2. IXP2800 Network Processor Detailed Diagram
A9750-03
SHaC Unit
Scratch
Hash
CAP
DRAM
DRAM
Controller
DRAM
DRAM
Controller
DRAM
DRAM
Controller
SRAM
SRAM
Controller
SRAM
SRAM
Controller
SRAM
SP14/CSIX
De
vice
SRAM
Controller
Media
Controller
RBuf
TBuf
CSR
PCI
De
vice
Command Bus
Arbiter 1
Command Bus
Arbiter 0
PCI
Controller
CSRs
PCI
space
DMA
transfers
mast/targ
Cmd_Arb_1
(grant/request)
Cmd_Arb_0
(grant/request)
D_Pull_Bus
Arbiter
D_Push_Bus
Arbiter
Gasket
Intel
XScale ®
Core
S in
xfer
CSRs
ME0x10-0x17
Cluster 1
S out
xfer
D in
xfer
D out
xfer
Cmd
FIFO
Cmd
FIFO
CSRs
ME0x0-0x7
Cluster 0
S in
xfer
S out
xfer
D in
xfer
D out
xfer
S_Pull
Arb 0
D_Push
D_Pull
Cmd_1
Cmd_0
S_Pull_0
S_Push_0
S_Pull_1
S_Push_1
S_Push
Arb 0
S_Pull
Arb 1
S_Push
Arb 1
Notes:
Connected to the S_Push/Pull Buses
Connected to the S_Push/Pull Buses and D_Push/Pull Buses
= Chassis Components