1 data training pattern, 2 flow control training pattern, Data training pattern – Intel NETWORK PROCESSOR IXP2800 User Manual
Page 282: Flow control training pattern, Section 8.6.1, Ttern, Section, Section 8.6.2
282
Hardware Reference Manual
Intel
®
IXP2800 Network Processor
Media and Switch Fabric Interface
8.6.1
Data Training Pattern
The data pin training sequence is shown in
. This is a superset of SPI-4 training sequence,
because it includes the TPAR/RPAR and TPROT/RPOT pins, which are not included in SPI-4.
8.6.2
Flow Control Training Pattern
This section defines training for the flow control pins (
). These pins are normally used for
CSIX flow control (
), but can be programmed for use as SPI-4 Status Channel. The
training pattern used is based on the usage.
The flow control pin training sequence when the pins are used for CSIX flow control is shown in
Table 107. Data Training Sequence
Cycle
(Note 4)
PROT
PA
R
CTL
DATA
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
1
0
x
1
0
x
x
0
0
0
0
0
0
0
0
0
a
b
c
d
2 to 11
0
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
12 to 21
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
20
α
-18 to 20
α
-9
0
1
1
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
20
α
-8 to 20
α
+1
1
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
NOTES:
1. In cycle 1, x and abcd depend on the contents of the interval after the last preceding control word. This is
an Idle Control Word.
2. α
represents the number of repeats, as specified in SPI-4 specification. When the IXP2800 Network
Processor is transmitting training sequences the value is in Train_Data[Alpha].
3. On receive, the IXP2800 Network Processor will do dynamic deskew when Train_Data[Ignore_Training]
is 0, and RCTL = 1 and RDATA = 0x0FFF for three consecutive samples. Note that RPROT and RPAR are
ignored when recognizing the start of training sequence.
4. These are really phases (i.e.,each edge of the clock is counted as one sample).
5. This cycle is valid for SPI-4, it is not used in CSIX training.
Table 108. Flow Control Training Sequence
Cycle
(Note 3)
XCSOF
XCDAT
XCP
A
R
XCSRB
3
2
1
0
1 to 10
1
1
1
0
0
0
0
11 to 20
0
0
0
1
1
1
1
20
α
-19 to 20
α
-10
1
1
1
0
0
0
0
20
α
-9 to 20
α
0
0
0
1
1
1
1
NOTE:
1.
α
represents the number of repeats, as specified in SPI-4 specification. When
the IXP2800 Network Processor is transmitting training sequences the value is
in Train_Flow_Control[Alpha].
2. On receive, the IXP2800 Network Processor will do dynamic deskew when
Train_Flow_Control[Ignore_Training] is 0, and RXCSOF = 1, RXCDATA =
0xC, RXCPAR =0, and RXCSRB = 0 for three consecutive samples.
3. These are really phases (i.e.,each edge of the clock is counted as one sample).