Intel NETWORK PROCESSOR IXP2800 - Manual (Page 105)

Hardware Reference Manual 105
Intel
®
IXP2800 Network Processor
Intel XScale ® Core
3.6.4 Reconfiguring the Data Cache as Data RAM
Software has the ability to lock tags associated with 32-byte lines in the data cache, thus creating
the appearance of data RAM. Any subsequent access to this line will always hit the cache unless it
is invalidated. Once a line is locked into the data cache it is no longer available for cache allocation
on a line fill. Up to 28 lines in each set can be reconfigured as data RAM, such that the maximum
data RAM size is 28 Kbytes.
Hardware does not support locking lines into the mini-data cache; any attempt to do this will
produce unpredictable results.
There are two methods for locking tags into the data cache; the method of choice depends on the
application. One method is used to lock data that resides in external memory into the data cache
and the other method is used to reconfigure lines in the data cache as data RAM. Locking data from
external memory into the data cache is useful for lookup tables, constants, and any other data that is
frequently accessed. Reconfiguring a portion of the data cache as data RAM is useful when an
application needs scratch memory (bigger than the register file can provide) for frequently used
variables. These variables may be strewn across memory, making it advantageous for software to
pack them into data RAM memory.
Refer to the Intel XScale
®
Core Developers Manual for code examples.
Tags can be locked into the data cache by enabling the data cache lock mode bit located in
coprocessor 15, register 9. Once enabled, any new lines allocated into the data cache will be locked
down.
Note that the PLD instruction will not affect the cache contents if it encounters an error while
executing. For this reason, system software should ensure the memory address used in the PLD is
correct. If this cannot be ascertained, replace the PLD with a LDR instruction that targets a scratch
register.
Lines are locked into a set starting at way 0 and may progress up to way 27; which set a line gets
locked into depends on the set index of the virtual address of the request.
Figure 19 is an example
of where lines of code may be locked into the cache along with how the round-robin pointer is
affected.
Software can lock down data located at different memory locations. This may cause some sets to
have more locked lines than others as shown in Figure 19 .
Lines are unlocked in the data cache by performing an unlock operation.
Before locking, the programmer must ensure that no part of the target data range is already resident
in the cache. The Intel XScale
®
core will not refetch such data, which will result in it not being
locked into the cache. If there is any doubt as to the location of the targeted memory data, the cache
should be cleaned and invalidated to prevent this scenario. If the cache contains a locked region
that the programmer wishes to lock again, then the cache must be unlocked before being cleaned
and invalidated.