Intel NETWORK PROCESSOR IXP2800 - Manual (Page 425)

Hardware Reference Manual 425
Intel
®
IXP2800 Network Processor
Performance Monitor Unit
11.4.6.30 IXP2800 Network Processor DRAM CH2 Events Target ID(010100) /
Design Block #(0011)
17 cr1_deq_id_wph P_CLK single separate Dequeue cr1 cmd/data
18 dram_req_rph[4] P_CLK single separate cr1 has a valid req
19 next_cr1_full_wph P_CLK single separate cr1 FIFO hit the full threshold
Table 183. IXP2800 Network Processor Dram DPSA PMU Event List (Sheet 2 of 2)
Table 184. IXP2800 Network Processor Dram CH2 PMU Event List (Sheet 1 of 5)
Event
Numbe
r
Event Name
Clock
Domain
Single
pulse/
Long
pulse
Burst Description
0 DATA_ERROR_SYNC_RPH P_CLK single separate
Indicates that a data error has been detected on
the RDRAM read data from the RMC. The signal
asserts for both correctable and uncorrectable
errors.
1
GET_PULL_DATA_SYNC_R
PH
P_CLK single separate
Asserts when the RMC is accepting RDRAM
write data from the d_app_unit block.
2
TAKE_PUSH_DATA_SYNC_
RPH
P_CLK single separate
Asserts when the RMC is driving RDRAM read
data to the d_push_bus_if block.
3 START_SYNC_RPH P_CLK single separate
Input to RMC, asserted to request memory
transaction and deasserted when the RMC is
ready to accept a command (i.e., when RMC
asserts GETC_SYNC_RPH).
4 GETC_SYNC_RPH P_CLK single separate
Output from RMC, indicates the RMC is ready to
accept a command for the RDRAM channel.
5 reserved
6 reserved
7 dps_push_ctrl_fifo_full_rph P_CLK single separate
Active when the push_control FIFO is nearly full,
i.e., > 6 entries
1:0 2'H0
8 push_ctrl_fifo_enq_rph P_CLK single separate
Active when enqueueing push control and status
data to the FIFOs in d_push_bus_if.
9
DPS_ENQ_PUSH_DATA_R
PH
P_CLK single separate
Active when enqueueing data from the RMC into
the push data FIFO.
10 valid_push_data_rp P_CLK single separate
Is (data_valid AND !create_databackup), where
data_valid indicates data available in the
d_push_bus_if data FIFO; create_databackup
asserts when the push arbiter FIFO (in dp_unit
block) gets nearly full. When it asserts, it prevents
dequeueing from the d_push_bus_if data FIFO.
11 push_ctrl_fifo_empty_rph P_CLK single separate Active when the push control FIFO is empty.
12 deq_push_data_wph P_CLK single separate
Asserts to dequeue from the data FIFO in the
d_push_bus_if block.
13 deq_csr_data_wph P_CLK single separate
Pulses active when reading from a CSR instead
of DRAM.