3 datapath registers, 1 general-purpose registers (gprs), 2 transfer registers – Intel NETWORK PROCESSOR IXP2800 User Manual

Page 171: Datapath registers 4.1.3.1, General-purpose registers (gprs), Transfer registers

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Hardware Reference Manual

171

Intel

®

IXP2800 Network Processor

Microengines

4.1.3

Datapath Registers

As shown in the block diagram in

Figure 56

, each Microengine contains four types of 32-bit

datapath registers:

256 General Purpose registers

512 Transfer registers

128 Next Neighbor registers

640 32-bit words of Local Memory

4.1.3.1

General-Purpose Registers (GPRs)

GPRs are used for general programming purposes. They are read and written exclusively under

program control. GPRs, when used as a source in an instruction, supply operands to the execution
datapath. When used as a destination in an instruction, they are written with the result of the

execution datapath. The specific GPRs selected are encoded in the instruction.

The GPRs are physically and logically contained in two banks, GPR A and GPR B, defined in

Table 57

.

Note: The Microengine registers are defined in the IXP2400 and IXP2800 Network Processor

Programmer’s Reference Manual.

4.1.3.2

Transfer Registers

There are four types of transfer (abbreviated as Xfer) registers used for transferring data to and
from the Microengine and locations external to the Microengine (DRAMs, SRAMs, etc.).

S_TRANSFER_IN

S_TRANSFER_OUT

D_TRANSFER_IN

D_TRANSFER_OUT

Transfer_In registers, when used as a source in an instruction, supply operands to the execution
datapath. The specific register selected is either encoded in the instruction or selected indirectly

using T_Index. Transfer_In registers are written by external units based on the Push_ID input to

the Microengine.

Transfer_Out registers, when used as a destination in an instruction, are written with the result from
the execution datapath. The specific register selected is encoded in the instruction, or selected

indirectly via T_Index. Transfer_Out registers supply data to external units based on the Pull_ID

input to the Microengine.

As shown in

Figure 56

, the S_TRANSFER_IN and D_TRANSFER_IN registers connect to both

the S_Push and D_Push buses via a multiplexor internal to the Microengine. Additionally, the

S_TRANSFER_OUT and D_TRANSFER_OUT Transfer registers connect to both the S_Pull and

D_Pull buses. This feature enables a programmer to use the either type of transfer register
regardless of the source or destination of the transfer.

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