6 transmit state machine, 1 spi-4.2 transmitter state machine, Transmit state machine 8.9.6.1 – Intel NETWORK PROCESSOR IXP2800 User Manual

Page 314: Spi-4.2 transmitter state machine

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314

Hardware Reference Manual

Intel

®

IXP2800 Network Processor

Media and Switch Fabric Interface

8.9.6

Transmit State Machine

Table 114

describes the transmitter state machine by providing guidance in interfacing to the

network processor. The state machine is described as three separate state machines for SPI-4.2,

training, and CSIX-L1. When each machine is inactive, it tracks the states of the other two state
machines.

8.9.6.1

SPI-4.2 Transmitter State Machine

The SPI-4.2 Transmit State Machine makes state transitions on each bus transfer of 16 bits, as
described in

Table 114

.

Table 114. SPI-4.2 Transmitter State Machine Transitions on 16-Bit Bus Transfers

Current State

Next State

Conditions

Idle Control

Idle Control

No data pending and no training sequence pending,
CSIX-L1 mode disabled.

Payload Control

Data pending and no training sequence pending,
CSIX-L1 mode disabled.

Training

Training sequence pending, CSIX-L1 mode disabled.

CSIX

CSIX-L1 mode enabled.

Payload Control

Data Burst

Always

Data Burst

Data Burst

Until end of burst as programmed by software.

Payload Control

Data pending and no training sequence pending and
CSIX-L1 mode not enabled.

Idle Control

No data to send or training sequence pending or CSIX-
L1 mode enabled.

Tracking Other State Machine States

Training

Training

Training SM not entering CSIX-L1 or SPI state.

CSIX

Training SM entering CSIX-L1 state.

Payload Control

Training SM entering SPI state and data pending.

Idle Control

Training SM entering SPI state and no data pending.

CSIX

CSIX

CSIX-L1 SM not entering Training or SPI state.

Training

CSIX-L1 SM entering Training state.

Payload Control

CSIX-L1 SM entering SPI state and data pending.

Idle Control

CSIX-L1 SM entering SPI state and no data pending.

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