181 sram ch0 pmu event list – Intel NETWORK PROCESSOR IXP2800 User Manual

Page 422

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422

Hardware Reference Manual

Intel

®

IXP2800 Network Processor

Performance Monitor Unit

11.4.6.27

SRAM CH0 Events Target ID(001110) / Design Block #(0010)

Table 181. SRAM CH0 PMU Event List (Sheet 1 of 2)

Event

Number

Event Name

Clock

Domain

Single

pulse/

Long

pulse

Burst

Description

0

QDR I/O Read

S_CLK

single

separate

QDR I/O Read

1

QDR I/O Write

S_CLK

single

separate

QDR I/O Write

2

Read Cmd Dispatched

P_CLK

single

separate

Read Cmd Dispatched

3

Write Cmd Dispatched

P_CLK

single

separate

Write Cmd Dispatched

4

Swap Cmd Dispatched

P_CLK

single

separate

Swap Cmd Dispatched

5

Set Dispatched

P_CLK

single

separate

Set Dispatched

6

Clear Cmd Dispatched

P_CLK

single

separate

Clear Cmd Dispatched

7

Add Cmd Dispatched

P_CLK

single

separate

Add Cmd Dispatched

8

Sub Cmd Dispatched

P_CLK

single

separate

Sub Cmd Dispatched

9

Incr Cmd Dispatched

P_CLK

single

separate

Incr Cmd Dispatched

10

Decr Cmd Dispatched

P_CLK

single

separate

Decr Cmd Dispatched

11

Ring Cmd Dispatched

P_CLK

single

separate

Ring Cmd Dispatched

12

Jour Cmd Dispatched

P_CLK

single

separate

Jour Cmd Dispatched

13

Deq Cmd Dispatched

P_CLK

single

separate

Deq Cmd Dispatched

14

Enq Cmd Dispatched

P_CLK

single

separate

Enq Cmd Dispatched

15

CSR Cmd Dispatched

P_CLK

single

separate

CSR Cmd Dispatched

16

WQDesc Cmd Dispatched

P_CLK

single

separate

WQDesc Cmd Dispatched

17

RQDesc Cmd Dispatched

P_CLK

single

separate

RQDesc Cmd Dispatched

18

FIFO Dequeue – CmdA0 Inlet Q

P_CLK

single

separate

FIFO Dequeue – CmdA0 Inlet Q

19

FIFO Enqueue – CmdA0 Inlet Q

P_CLK

single

separate

FIFO Enqueue – CmdA0 Inlet Q

20

FIFO Valid – CmdA0 Inlet Q

P_CLK

long

separate

FIFO Valid – CmdA0 Inlet Q

21

FIFO Full – CmdA1 Inlet Q

P_CLK

long

separate

FIFO Full – CmdA1 Inlet Q

22

FIFO Dequeue – CmdA1 Inlet Q

P_CLK

single

separate

FIFO Dequeue – CmdA1 Inlet Q

23

FIFO Enqueue – CmdA1 Inlet Q

P_CLK

single

separate

FIFO Enqueue – CmdA1 Inlet Q

24

FIFO Valid – CmdA1 Inlet Q

P_CLK

long

separate

FIFO Valid – CmdA1 Inlet Q

25

FIFO Full – CmdA1 Inlet Q

P_CLK

long

separate

FIFO Full – CmdA1 Inlet Q

26

FIFO Dequeue – Wr Cmd Q

S_CLK

single

separate

FIFO Dequeue – Wr Cmd Q

27

FIFO Enqueue – Wr Cmd Q

P_CLK

single

separate

FIFO Enqueue – Wr Cmd Q

28

FIFO Valid – Wr Cmd Q

S_CLK

long

separate

FIFO Valid – Wr Cmd Q

29

FIFO Full – Wr Cmd Q

P_CLK

long

separate

FIFO Full – Wr Cmd Q

30

FIFO Dequeue – Queue Cmd Q

S_CLK

single

separate

FIFO Dequeue – Queue Cmd Q

31

FIFO Enqueue – Queue Cmd Q

P_CLK

single

separate

FIFO Enqueue – Queue Cmd Q

32

FIFO Valid – Queue Cmd Q

S_CLK

long

separate

FIFO Valid – Queue Cmd Q

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