Intel NETWORK PROCESSOR IXP2800 - Manual (Page 202)

202 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
DRAM
• Supports chaining for burst DRAM push operations to tell the arbiter to grant consecutive push
requests.
• Supports data error bit handling and delivery.
Figure 71 shows the functional blocks for the DRAM Push/Pull Arbiter.
5.11.1 Arbiter Push/Pull Operation
Within the arbiter there are two functional units: the push arbiter and the pull arbiter. Push and pull
always refer to the way data is flowing from the bus master, i.e., a Microengine makes a read
request, the DRAM channel does the read, and then “pushes” the data back to the Microengine.
For a push transaction, a push master drives the command and data to the DRAM push arbiter
(DPSA) and into a dedicated request FIFO. When that command is at the head of the FIFO, and it
is either the requesting unit’s turn to go based on the round-robin arbitration policy, or there are no
other requesters, then the arbiter will “grant” the request. This grant means that the arbiter delivers
the push data to the correct target with all the correct handshakes and retires the request (a data
transaction is always eight bytes).
The DRAM pull arbiter (DPLA) is slightly different because it functions on bursts of data
transactions instead of single transactions. For a pull transaction, a pull master drives a command
to the pull arbiter and into a dedicated request FIFO. When the command gets to the head of the
FIFO it is evaluated, s was done for the push arbiter. The difference is that each command may
reference bursts of data movements (always in multiples of eight bytes). The arbiter grants the
command, and keeps it granted until it increments through all of the data movements required by
the command. As the data is read from its source, the command is modified to address the next data
address, and a handshake to the requesting unit is driven when the data is valid.
Figure 71. DRAM Push/Pull Arbiter Functional Blocks
A9731-02
D2-Unit D1-Unit D0-Unit
TC0-Cluster TC1-Cluster PCI
Intel
XScale ®
Core
TBUF/
RBUF
DP-Unit
DPSA-FUB DPLA-FUB