Intel NETWORK PROCESSOR IXP2800 - Manual (Page 312)

312 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
Media and Switch Fabric Interface
8.9.5 Dual Protocol (SPI and CSIX-L1) Support
In many system designs that are less bandwidth-intensive, a single network processor can forward
and process data from the framer to the fabric and from the fabric to the framer. A bridge chip must
pass data between the network processor and multiple physical devices. The network processor
supports multiplexing SPI-4.2 and CSIX-L1 protocol elements over the same transmitter and
receiver physical interfaces, differentiated by a protocol signal that is de-asserted for SPI-4.2
protocol elements and asserted for CSIX-L1 protocol elements.
In the dual protocol configuration, the CSIX-L1 configuration of the network processor
corresponds to the dual chip, full duplex configuration. The flow control transmitter interface is
looped back to the flow control receiver interface, either externally or internally. Only the LVTTL
status interface is available for the SPI-4.2 interface.
8.9.5.1 Dual Protocol Receiver Support
When the network processor receiver is configured for dual protocol support, the aggregate
receiver buffer is partitioned in three ways: 50% for data CFrames (4 Kbytes), 37.5% for SPI-4.2
bursts (3 Kbytes) and 12.5% for control CFrames (1 Kbyte). The buffer sizes within each partition
are independently configurable. Link-level flow control can be independently configured for
assertion at thresholds of 25%, 50%, 75%, or 87.5%. For the traffic associated with each partition,
an additional 680 bytes of packed FIFO storage is available to accommodate received traffic after
assertion of link-level flow control.
8.9.5.2 Dual Protocol Transmitter Support
When the network processor transmitter is configured for dual protocol support, the aggregate
transmitter buffer is partitioned three ways, in the same proportions as the receiver. Each partition
operates as a separate ring. The transmitter services each ring in round-robin order. If no CFrames
are pending, an Idle CFrame is transmitted to update link-level flow control. If no SPI-4.2 bursts
are pending, idle control words are not sent.