Intel NETWORK PROCESSOR IXP2800 - Manual (Page 216)

216 Hardware Reference Manual
Intel
®
IXP2800 Network Processor
SRAM Interface
Note: For a Ring or Journal,
Head
and
Tail
must be initialized to the same address.
Journals/Rings can be configured to be one of eight sizes, as shown in Table 75 .
The following sections contain pseudo-code to describe the operation of the various queue and ring
instructions.
Note: For these examples, NIL is the value 0.
6.4.3.1 Read_Q_Descriptor Commands
These commands are used to bring the queue descriptor data from QDR SRAM memory into the
Q_array
. Only portions of the
Q_descriptor
are read with each variant of the command, to
minimize QDR SRAM bandwidth utilization. It is assumed that microcode has previously evicted
the
Q_descriptor
data for the entry prior to overwriting the entry data with the new
Q_descriptor
data. Refer to the section, “SRAM (Read Queue Descriptor)”, in the IXP2400 and
IXP2800 Network Processor Programmer’s Reference Manual, for more information.
.
6.4.3.2 Write_Q_Descriptor Commands
The write_Q_descriptor commands are used to evict an entry in the
Q_array
and return its
contents to QDR SRAM memory. Only the valid fields of the
Q_descriptor
are written, to
minimize QDR SRAM bandwidth utilization. Refer to the section, “SRAM (Write Queue
Descriptor)”, in the IXP2400 and IXP2800 Network Processor Programmer’s Reference Manual,
for more information.
Table 74. Ring/Journal Format
Name
Longword
Number Bit
Number
Definition
Ring Size 0
31
:
29
See Table 75 for size encoding.
Head 0 23 : 0 Get pointer
Tail 1 23 : 0 Put pointer
Ring Count 2
23
:
0
Number of longwords on the ring
Table 75. Ring Size Encoding
Ring Size Encoding Size of Journal/Ring Area Head/Tail Field Base Head and Tail Field Increment
000 512 longwords 23:9 8:0
001 1K 23:10 9:0
010 2K 23:11 10:0
011 4K 23:12 11:0
100 8K 23:13 12:0
101 16K 23:14 13:0
110 32K 23:15 14:0
111 64K 23:16 15:0