Intel NETWORK PROCESSOR IXP2800 - Manual (Page 247)

Hardware Reference Manual 247
Intel
®
IXP2800 Network Processor
Media and Switch Fabric Interface
8.2 Receive
The receive section consists of:
• Receive Pins ( Section 8.2.1 )
• Checksum ( Section 8.2.2 )
• Receive Buffer (RBUF) ( Section 8.2.2 )
• Full Element List ( Section 8.2.3 )
• Rx_Thread_Freelist ( Section 8.2.4 )
• Flow Control Status ( Section 8.2.7 )
Figure 91 is a simplified block diagram of the receive section.
Figure 91. Simplified Receive Section Block Diagram
A9339-01
Full Indication to Flow Control
CSIX CFrames mapped by RX_Port_Map CSR
(normally Flow Control CFrames are mapped here)
128
RCLK
RCLK REF
Clock for
Receive
Functions
TXCFC
(FCIFIFO full)
TXCDAT
Full
Element
List
Receive
Thread
Freelists
Checksum
Buffers
RDAT
RCTL
RPAR
RPROT
RSTAT
S_Push_Data (to MEs)
FCEFIFO
- - - - - -
- - - - - -
- - - - - -
- - - - - -
RBUF
- - - - - -
- - - - - -
- - - - - -
- - - - - -
SPI-4
Protocol
Logic
SPI-4
Flow
Control
CSIX
Protocol
Logic
Control
32
D_Pull_Data (to DRAM)
CSR Write
64