2 scratchpad, 1 scratchpad description, Scratchpad 7.1.2.1 – Intel NETWORK PROCESSOR IXP2800 User Manual

Page 227: Scratchpad description

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Hardware Reference Manual

227

Intel

®

IXP2800 Network Processor

SHaC — Unit Expansion

7.1.2

Scratchpad

7.1.2.1

Scratchpad Description

The SHaC Unit contains a 16-Kbyte Scratchpad memory, organized as 4K 32-bit words, that is

accessible by the Intel XScale

®

core and Microengines. The Scratchpad connects to the internal

Command, S_Push and S_Pull, CSR, and APB buses, as shown in

Figure 85

.

The Scratchpad memory provides the following operations:

Normal reads and writes. 1 — 16 longwords (32 bits) can be read/written with a single

command. Note that Scratchpad is not byte-writable. Each write must write all four bytes.

Atomic read-modify-write operations, bit-set, bit-clear, increment, decrement, add, subtract,
and swap. The Read-Modify-Write (RMW) operations can also optionally return the

premodified data.

16 Hardware Assisted Rings for interprocess communication.

1

Standard support of APB peripherals such as UART, Timers, and GPIOs through the ARM*

Advanced Peripheral Bus (APB).

Fast write and standard read and write operations to CSRs through the CSR Bus. For a fast
write, the write data is supplied with the command, rather than pulled from the source.

Push/Pull Reflector Mode that supports reading from a device on the pull bus and writing the

data to a device on the push bus (reflecting the data from one bus to the other). A typical
implementation of this mode is to allow a Microengine to read or write the transfer registers or

CSRs in another Microengine. Note that the Push/Pull Reflector Mode only connects to a

single Push/Pull bus. If a chassis implements more than one Push/Pull bus, it can only connect
one specific bus to the CAP.

Scratchpad memory is provided as a third memory resource (in addition to SRAM and DRAM)

that is shared by the Microengines and Intel XScale

®

core. The Microengines and Intel XScale

®

core can distribute memory accesses between these three types of memory resources to provide a
greater number of memory accesses occurring in parallel.

1.

A ring is a FIFO that uses a head and tail pointer to store/read information in Scratchpad memory.

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