Achronix ACE Version 5.0 User Manual

Page 298

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Running the SnapShot Debugger

Chapter 4. Tasks

Rstn out

Output

usr clk

When low, indicates SnapShot logic is being reset. May be used
to reset portions of user’s design, if design utilizes Stimuli. This
output may safely be left floating.

Arm

Output

usr clk

Indicates SnapShot logic has been armed. When high, the value
in Stimuli is valid. Does not indicate whether SnapShot is
sampling (may stay high after sampling is complete.) Will
deassert when Rstn out is active. This output may safely be left
floating.

Stimuli
[35:0]

Output

usr clk

Data that may be used as input to the user’s design. The data
originates from the SnapShot Debugger View. Data is valid only
while Arm is high. This value will not change while Arm is
high. This output may safely be left floating.

Note:

1)

Bring up these ports on the top-level design block.

NOTE:

There is a Tap-Controller (JTAP) macro embedded inside Speedster parts which meets the
IEEE1149.1 JTAG standard. All the JTAG-specific signals are handled automatically by
ACE. Thus the user does not need to assign any timing (

.sdc

) or placement (

.pdc

)

constraints for these JTAG signals.

SnapShot Macro Parameter Definition

Parameter

Defined Values (default)

Description

MNTR WIDTH

36, 72, 108, 144 (144)

Specifies the width of the data
captured per user clock. SnapShot
always samples data for 1024 clocks.

OUTPUTPIPELINING non-negative integers (0)

Adds the specified number of cycles of
latency to the Rstn out, Arm and
Stimuli outputs to enable fast usr clk
speeds, at the expense of increased
logic resource utilization. Should be
left at 0 unless Rstn out, Arm, or
Stimuli are used within the
Design-Under-Test.

DUTNAME

128-character RTL-valid identifier
(

"none specified"

)

This parameter is intended to establish
the name of the Design-Under-Test,
allowing the user to distinguish
between SnapShot logic instances in
different devices. Only characters are
allowed (no spaces, quotes, etc) and it
is recommended to utilize the
characters of the module name. The
restriction on characters allowed for
this parameter is the same as those for
Verilog or VHDL module/entity
naming requirements.

The DUTNAME is logged in the SnapShot log file (

˜/snapshot.log

by default) during SnapShot

execution. The log statement will be similar to ”

Name of DUT:

DUTNAME ”, where DUTNAME will

be replaced by the value of the parameter.

UG001 Rev. 5.0 - 5th December 2012

http://www.achronix.com

286

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