Achronix ACE Version 5.0 User Manual
Page 95
Editors
Chapter 3. Concepts
Gen 3 Equalization Page
This page contains all the options that govern Gen 3 PCI Express equalization.
PCIe Editor Gen 3 Equalization Page Options
Option
Description
Equalization Method
The Equalization method to use: Preset, Algorithm, or Table
Equalization TS1 Ack
Delay
Defines how long the upstream port (Phase 2) or downstream port (Phase
3) waits after requesting new coefficients/presets before looking for
incoming EQ TS1 sets from the remote link partner. This delay by
specification should be set to the round trip delay to the remote link
partner (including logic delays in the requesting port) + 500ns.
Preset
Maximum Preset Address
Step through the PCI Express Specification-defined Tx Presets (0 through
9). The Preset method trying all presets 0 to 9 is recommended for users to
start with if they are unsure which method they should use.
Algorithm
Precursor Step Size
The algorithm precursor step size
Postcursor Step Size
The algorithm postcursor step size
Precursor Limit
The algorithm precursor limit
Postcursor Limit
The algorithm postcursor limit
Table Address Limit
The table address limit. Be careful when assigning the table address limit
not to exceed the Equalization time limit.
Table Precursor Coefficients (hex)
COEF0
COEF1
. . .
. . .
COEF31
Table Postcursor Coefficients (hex)
COEF0
COEF1
. . .
. . .
COEF31
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UG001 Rev. 5.0 - 5th December 2012