Intel PXA255 - Manual (Page 125)

Intel® PXA255 Processor Developer’s Manual 4-21
System Integration Unit
— Interrupt Controller FIQ Pending Register (ICFP) – contains the interrupts from all
sources that can generate an FIQ interrupt. The Interrupt Controller Level register (ICLR)
is programmed to send interrupts to the ICFP to generate an FIQ.
• The second level uses registers contained in the source device (the device generating the first-
level interrupt bit). The second-level interrupt status gives additional information about the
interrupt and is used inside the interrupt service routine. In general, multiple second-level
interrupts are OR’ed to produce a first-level interrupt bit.
In most cases, the root cause of an interrupt can be determined by reading two register locations:
the ICIP for an IRQ interrupt or the ICFP for an FIQ interrupt to determine the interrupting device.
You then read the status register within that device to find the exact function requesting service.
When the ICCR[DIM] bit is zero, the Interrupt Mask Register is ignored during Idle mode, and all
enabled interrupts cause the processor to exit from idle mode. Otherwise, only unmasked interrupts
cause the processor to exit from idle mode. The reset state of ICCR[DIM] is zero.
Figure 4-2 shows a block diagram of the Interrupt Controller.
4.2.2 Interrupt Controller Register Definitions
The interrupt controller contains the following registers:
• Interrupt Controller IRQ Pending register (ICIP)
• Interrupt Controller FIQ Pending register (ICFP)
• Interrupt Controller Pending register (ICPR)
• Interrupt Controller Mask register (ICMR)
• Interrupt Controller Level register (ICLR)
• Interrupt Controller Control register (ICCR)
Figure 4-2. Interrupt Controller Block Diagram
Interrupt Mask
Register (ICMR)
Interrupt Source
Bit
Interrupt Level
Register (ICLR)
FIQ
Interrupt
IRQ
Interrupt
to
Processor
to
Processor
Interrupt Pending
Register (ICPR)
FIQ Interrupt
Pending Register
IRQ Interrupt
Pending Register
23 23
All Other Qualified
Interrupt Bits
ICCR[DIM]=0 & Idle mode=’1’
(ICFP)
(ICIP)