Intel PXA255 - Manual (Page 537)

Intel® PXA255 Processor Developer’s Manual 15-35
MultiMediaCard Controller
15.5.14 MMC_ARGH Register (MMC_ARGH)
MMC_ARGH, shown in Table 15-19 , specifies the upper 16 bits of the argument for the current
command.
This is a read/write register. Ignore reads from reserved bits. Write zeros to reserved bits.
15.5.15 MMC_ARGL Register (MMC_ARGL)
MMC_ARGL, shown in Table 15-20 , specifies the lower 16 bits of the argument in the current
command.
This is a read/write register. Ignore reads from reserved bits. Write zeros to reserved bits.
111001 CMD57 reserved
111010 CMD58 SPI READ_OCR
111011 CMD59 SPI CRC_ON_OFF
111100 CMD60 MMC reserved for manufacturer
111101 CMD61 MMC reserved for manufacturer
111110 CMD62 MMC reserved for manufacturer
111111 CMD63 MMC reserved for manufacturer
Table 15-18. Command Index Values (Sheet 3 of 3)
CMD
INDEX
COMM
AND
MODE ABBREVIATION
Table 15-19. MMC_ARGH Bit Definitions
Physical Address
0x4110_0034
MMC_ARGH Register MultiMediaCard Controller
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
reserved ARG_H
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits Name Description
31:16 — reserved
15:0 ARG_H Upper 16 bits of command argument
Table 15-20. MMC_ARGL Bit Definitions
Physical Address
0x4110_0038
MMC_ARGL Register MultiMediaCard Controller
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
reserved ARG_L
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bits Name Description
31:16 — reserved
15:0 ARG_L Lower 16 bits of command argument