8 multiple block write, 9 multiple block read – Intel PXA255 User Manual
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Intel® PXA255 Processor Developer’s Manual
MultiMediaCard Controller
These registers must be set before the clock is started:
•
Update these MMC_CMDAT register bits:
— Set the MMC_CMDAT[RESPONSE_FORMAT] bit.
— Set the MMC_CMDAT[DATA_EN] bit.
— Clear the MMC_CMDAT[WRITE/READ] bit.
— Clear the MMC_CMDAT[STREAM_BLOCK] bit.
— Clear the MMC_CMDAT[BUSY] bit.
— Clear the MMC_CMDAT[INIT] bit.
•
Set MMC_NOB register to 0x0001.
•
Set MMC_BLKLEN register to the number of bytes per block.
•
Turn the clock on.
After it turns the clock on, the software must perform these steps:
1. Wait for the response as described in
.
2. Read data from the MMC_RXFIFO FIFO, as data becomes available in the FIFO, and
continue reading until all data is read from the FIFO.
3. Set MMC_I_MASK to 0x1e.
4. Wait for the MMC_I_REG[DATA_TRAN_DONE] interrupt.
5. Read the MMC_STAT register to verify the status of the transaction (i.e. CRC error status).
15.4.8
Multiple Block Write
The multiple block write mode is similar to the single block write mode, except that multiple
blocks of data are transferred. Each block is the same length. All the registers are set as they are for
the single block write, except that the MMC_NOB register is set to the number of blocks to be
written.
The multiple block write mode also requires a stop transmission command, CMD12, after the data
is transferred to the card. After the MMC_I_REG[DATA_TRAN_DONE] interrupt occurs, the
software must program the controller registers to send a stop data transmission command.
15.4.9
Multiple Block Read
The multiple block read mode is similar to the single block read mode, except that multiple blocks
of data are transferred. Each block is the same length. All the registers are set as they are for the
single block read, except that the MMC_NOB register is set to the number of blocks to be read.
The multiple block read mode requires a stop transmission command, CMD12, after the data from
the card is received. After the MMC_I_REG[DATA_TRAN_DONE] interrupt has occurred, the
software must program the controller registers to send a stop data transmission command.