Intel PXA255 - Manual (Page 305)

Intel® PXA255 Processor Developer’s Manual 7-43
LCD Controller
7.6.10 TMED Control Register (TCR)
TCR, shown in Table 7-15 , selects various options available in the TMED dither algorithm. There
are two Temporal Modulated Energy Distribution algorithms that can be used. The default,
recommended setting is 0x0000754F. This setting provides superior display results in most cases.
For more details on the effects of the individual fields within this register, please refer to
Section 7.3.3 .
TMED Energy Distribution Select (TED) — selects which matrix is used in the final step of
TMED algorithm. TMED = 1 selects the (preferred) TMED2 matrix. TMED = 0 selects the older
TMED matrix. After the pixel value has gone through the algorithm to determine a lower and upper
boundary, the row and column counters are combined and run through one of the matrices to obtain
a number that will be compared to the 2 boundaries. If that number is between the 2 boundaries,
then the data out for this pixel in this frame is a 1, otherwise it is a 0.
TMED Horizontal Beat Suppression (THBS) — is the column shift value used as an offset that
is combined with the row (line) counter and the pixel counter to create an address to lookup in the
matrix. The matrix output is compared to the upper and lower boundaries defined in
Section 7.3.3 .
TMED Vertical Beat Suppression (TVBS) — is the block shift value used as an offset that is
combined with the pixel counter.
TMED Frame Number Adjuster Enable (FNAME) — allows the frame number adjuster to add
an offset to the current frame number before the value is sent through the algorithm. Setting this bit
enables the addition of the current frame number to a value composed from the row and column
counters. This value comes from one of the two look up matrices which is selected by
TMED[FNAM].
TMED Color Offset Adjuster Enable (COAE) — enables the color offset adjuster for each color.
The color offset adjuster creates the offset in the lower boundary in the TMED algorithm (refer to
Section 7.3.3 ). The Offset is created by adding either the output of the lookup matrix (input was the
Color Value) or‘00’ to the Seed value in the TSR for that color. The color offset adjuster for each
color can be disabled by clearing this bit. When cleared, this bit allows only the Seed Register
value to go through the algorithm.
TMED Frame Number Adjuster Matrix (FNAM) — selects which matrix is used when using
the frame number adjuster. A 1 will select the (recommended) TMED2 matrix, and a 0 will select
the older TMED matrix.
TMED Color Offset Adjuster Matrix (COAM) — selects which matrix is used when using the
color offset adjuster. A 1 will select the (recommended) TMED2 matrix, and a 0 will select the
older TMED matrix.
This is a read/write register. Ignore reads from reserved bits. Write zeros to reserved bits.