Intel PXA255 - Manual (Page 571)

Intel® PXA255 Processor Developer’s Manual 17-1
Hardware UART
17
This chapter describes the signal definitions and operations of the PXA255 processor hardware
UART (HWUART) port.
The HWUART interface pins are available via either the PCMCIA general purpose I/O (GPIO)
pins or the BTUART pins. Refer to
Section 4.1.2, “GPIO Alternate Functions” for more
information. When using the HWUART through the PCMCIA pins, they are driven at the same
voltage level as the memory interface. Because the PCMCIA signal nPWE is used for variable-
latency input / output (VLIO), VLIO cannot be used while the HWUART interface is using the
PCMCIA pins.
The HWUART is configured differently than the other UARTs. The HWUART supports full
hardware flow control.
17.1 Overview
The HWUART contains a UART and a slow infrared transmit encoder and receive decoder that
conforms to the IrDA Serial Infrared (SIR) Physical Layer Link Specification.
The UART performs serial-to-parallel conversion on data characters received from a peripheral
device or a modem and parallel-to-serial conversion on data characters received from the
processor. The processor can read the UART’s complete status during functional operation. Status
information includes the type and condition of transfer operations and error conditions (parity,
overrun, framing, or break interrupt) associated with the UART.
The HWUART operates in FIFO or non-FIFO mode. In FIFO mode, a 64-byte transmit FIFO holds
data from the processor until it is transmitted on the serial link and a 64-byte receive FIFO buffers
data from the serial link until it is read by the processor. In non-FIFO mode, the transmit and
receive FIFOs are bypassed.
The HWUART can also use direct memory access (DMA) to transfer data to and from the
HWUART.
17.2 Features
Software can program interrupts to meet its requirements. This minimizes the number of
computations required to handle the communications link. The UART operates in an environment
that is controlled by software and can be polled or is interrupt driven. The HWUART has these
features:
• Functionally compatible with the 16550A and 16750 UART specifications. The UART
supports not only the 16550A and 16750 industry standards but these additional functions as
well:
— DMA requests for transmit and receive data services
— Slow infrared asynchronous interface