Intel PXA255 - Manual (Page 384)

10-28 Intel® PXA255 Processor Developer’s Manual
UARTs
10.5.1 UART Register Differences
The default descriptions for BTMCR, BTMSR and STMCR are modified as shown in Table 10-21 .
.
Table 10-21. Flow Control Registers in BTUART and STUART
Bit7-5 Bit4 Bit3 Bit2 Bit1 Bit0
BTMCR reserved LOOP OUT2 reserved RTS reserved
BTMSR reserved CTS reserved reserved reserved DCTS
STMCR reserved LOOP OUT2 reserved reserved reserved