11 trailing or error bytes in the receive fifo, 3 ficp register definitions, 11 trailing or error bytes in the receive fifo -7 – Intel PXA255 User Manual

11 trailing or error bytes in the receive fifo, 3 ficp register definitions, 11 trailing or error bytes in the receive fifo -7 | Ficp register definitions -7 | Intel PXA255 User Manual | Page 391 / 598