For a schematic of – Altera IP Compiler for PCI Express User Manual

Page 138

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5–52

Chapter 5: IP Core Interfaces

Avalon-MM Application Interface

IP Compiler for PCI Express User Guide

August 2014

Altera Corporation

Figure 5–40

shows the IP Compiler for PCI Express reset logic in Qsys systems.

Pcie_rstn

also resets the rest of the IP Compiler for PCI Express, but only after the

following synchronization process:

1. When pcie_rstn asserts, the reset request module asserts reset_request,

synchronized to the Avalon-MM clock, to the Reset Synchronizer block.

2. The Reset Synchronizer block sends a reset pulse, reset_n_pcie, synchronized to

the Avalon-MM clock, to the IP Compiler for PCI Express.

3. The Reset Synchronizer resynchronizes reset_n_pcie to the IP Compiler for PCI

Express clock (pcie_core_clk or clk125_out) to reset the PCI Express Avalon-MM
bridge as well as the three IP Compiler for PCI Express layers with srst and crst.

4. The reset_request signal deasserts after Reset_n_pcie asserts.

The system-wide reset, reset_n, resets all IP Compiler for PCI Express circuitry not
affected by Pcie_rstn. However, the reset logic first intercepts the asynchronous
reset_n

, synchronizes it to the Avalon-MM clock, and sends a reset pulse,

Reset_n_pcie

, to the IP Compiler for PCI Express. The Reset Synchronizer

resynchronizes Reset_n_pcie to the IP Compiler for PCI Express clock to reset the PCI
Express Avalon-MM bridge as well as the three IP Compiler for PCI Express layers
with srst and crst.

Figure 5–40. PCI Express Reset Diagram

Note to figure

(1) The system-wide reset, reset_n/avalon_reset, indirectly resets all IP Compiler for PCI Express circuitry not affected by

PCIe_rstn/pcie_rstn_export

using the reset_n_pcie signal and the Reset Synchronizer module.

(2) For a description of the ltssm[4:0] bus, refer to

Table 5–7

.

System Interconnect Fa

b

ric

Reset_n

PCIe_rstn

npor

npor

srst

crst

l2_exit
hotrst_exit
dlup_exit
dl_ltssm[4:0]

Reset_request

RxmResetRequest_o

Reset Request

Module

PCI Express

Avalon-MM Bridge

Transaction Layer

Data Link Layer

Physical Layer

IP Compiler for PCI Express

Rstn_i

Reset_n_pcie

Reset Synchronizer

(to Avalon-MM clock)

Reset Synchronizer

(to IP Compiler for PCI Express

Clock)

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